BRR : 11308091
Click Here To View Tendering Authority. Aoc City/State :  Dharmapuri, Tamil Nadu
Tender Brief : Tender for Purchase Of Fpga Board For Vlsi Lab , Xc6slx16 Based On Xilinx Spartan-6 Fpga Features 14579 Logic Cells 136 Kb Of Block Ram 2 Nos Of Clock Management Tiles(Cmt) 2 Nos Of Memory Controller Block(Mcb) 186 User Installation Of Lines 2278 Kb Of Distributed Ram 32 Nos Of Dsp Slices 16 Nos Of Digital Input Using Slide Switches With Led Indication 16 Nos Of Digital Output Using Discrete Leds 16 2 Lcd Is Provided For Display The Text Message One Reset Switch One Switch For Giving Manual Clock Fpga Configuration Through On Board Xilinx Usb To Jtag Programmer With Isolation To Configure Fpg... Read More
Tender Value
Ref. Document
Contract Value
₹ 73,160
Submission Date
16-06-2026
Contract Date
25-06-2026
Completion Date
15 days
Participated Bidder List
3 No of Bidder(s)
Sr No. Bidder Name Bid Analytics Technical Bid Financial Bid AOC Bid Value Rank
1 cnet-technologies Bid Analytics 79,650 L3
2 cnet-technologies Bid Analytics 73,160 L1
3 cnet-technologies Bid Analytics 77,006.8 L2
Work Detail
tender for purchase of fpga board for vlsi lab , xc6slx16 based on xilinx spartan-6 fpga features 14579 logic cells 136 kb of block ram 2 nos of clock management tiles(cmt) 2 nos of memory controller block(mcb) 186 user installation of lines 2278 kb of distributed ram 32 nos of dsp slices 16 nos of digital input using slide switches with led indication 16 nos of digital output using discrete leds 16 2 lcd is provided for display the text message one reset switch one switch for giving manual clock fpga configuration through on board xilinx usb to jtag programmer with isolation to configure fpga on board flash prom xcf04s(programmable through usb to jtag programmer) total 186 installation of pins: 100 pins used for integrating peripheral like led , switches etc., balance pins are available to user in 3 nos of 20 pin header 1 no of 26 pin headers to interface vlim cards like traffic light controller / on - board tlc factory settable on board programmable pll oscillator from 1mhz to 100 mhz using jumpers 4 nos of 7 segment led display one relay and buzzer provided stepper & dc motor drive provided on board(motor optional) 4*4 matrix key provided on board i2c rtc interface on board temperature sensor interface spi based analog to digital converter resolution:12 bits number of channel: 2 channel input range: 0 to 3.3v speed:1 msps spi based digital to analog converter resolution:12 bits number of channel: 2 channel input range: 0 to 3.3v speed: 8.5μs setting time adc inputs and dac outputs are terminated at j801 connector housed in a sleek plastic cabinet with built in smps 5v / 2a compatible with xilinx ise web pack software ( version 12.1 and above) 12v dc motor 0.5kg stepper motor , purchase of fpga board for vlsi lab , xc6slx16 based on xilinx spartan-6 fpga features 14579 logic cells 136 kb of block ram 2 nos of clock management tiles(cmt) 2 nos of memory controller block(mcb) 186 user installation of lines 2278 kb of distributed ram 32 nos of dsp slices 16 nos of digital input using slide switches with led indication 16 nos of digital output using discrete leds 16 2 lcd is provided for display the text message one reset switch one switch for giving manual clock fpga configuration through on board xilinx usb to jtag programmer with isolation to configure fpga on board flash prom xcf04s(programmable through usb to jtag programmer) total 186 installation of pins: 100 pins used for integrating peripheral like led , switches etc., balance pins are available to user in 3 nos of 20 pin header 1 no of 26 pin headers to interface vlim cards like traffic light controller / on - board tlc factory settable on board programmable pll oscillator from 1mhz to 100 mhz using jumpers 4 nos of 7 segment led display one relay and buzzer provided stepper & dc motor drive provided on board(motor optional) 4*4 matrix key provided on board i2c rtc interface on board temperature sensor interface spi based analog to digital converter resolution:12 bits number of channel: 2 channel input range: 0 to 3.3v speed:1 msps spi based digital to analog converter resolution:12 bits number of channel: 2 channel input range: 0 to 3.3v speed: 8.5μs setting time adc inputs and dac outputs are terminated at j801 connector housed in a sleek plastic cabinet with built in smps 5v / 2a compatible with xilinx ise web pack software ( version 12.1 and above) 12v dc motor 0.5kg stepper motor
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Result Documents
Tender Documents
Download File Name File Description
Download f680d089-5c10-4fdd-a8e8-fc599925adf6 technicalevaluation notice
Download techsummary_815462 document
Download 130168ae-d4ab-433a-a06e-b45062c68360 result notice
Download aocfpga document
Download boqcomparativechart document
Download File Name File Description
Download BOQ_815462 Tender Documents
Download e2ec8c5e-10e5-4e03-a199-3f8f6460e49b Tender Documents
Download Tendernotice_1 (10) Tender Documents
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Awarded Bidder(s)
1
cnet-technologies
Rank : L1 (Lowest)
Bid Amount : ₹ 1,00,00,000
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