Educational and Research Institute Boards / Undertakings / PSU Closing in 0 days TDR #45466285

Tender For Digital Discovery Kit

Issued by Boards / Undertakings / PSU · surathkal, Karnataka
Tender Value
1.40 Lakhs
Estimated cost
Bid Submission
14 Oct 2024
0 days left
EMD
Ref. Documents
Bank guarantee accepted
Document Fee
Ref. Documents
Non-refundable
Tender Type
Online

Tender Overview

Competition Type
NCB
Bidding Type
Tender
Location / State
surathkal → Karnataka
EMD Exemption
Not Available
Quantity
Not Available

Project Description

Tender For Digital Discovery Kit; USB embedded development tool for highspeed and multi-channel applications Hardware • High speed inputs o 24 high-speed input channels (DIN0…23), accessible through one 2×16 connector, used with theLogic Analyzer in WaveForms (560kΩ||10pF) • Digital inputs and outputs o 16 digital I/Os (DIO24…39) arranged in two Pmod-style (2×6) connectors, used with the LogicAnalyzer in WaveForms o Each of the 16 pins can be configured for input (Logic Analyzer) or set as output o 800 MS/s () input sample rate when using maximum 8 inputs (and the High Speed Adapter), 400 MS/s () with maximum 16 inputs (with the High Speed Adapter), 200 MS/s () and lower withmaximum 32 inputs o User programmable input and output LVCMOS voltage levels from 1.2V to 3.3V (5Vcompatible) o 100 MHz () signal input bandwidth o 50 MHz () output signal bandwidth o Automatic or manual strength and slew settings for outputs Virtual Instruments • Logic Analyzer o See High Speed Input Hardware Specifications o 32 Channels at 200 MS/s () o 16 Channels at 400 MS/s () (with the optional High Speed Adapter) o 8 Channels at 800 o MS/s () (with the optional High Speed Adapter) o User programmable voltage levels at 1.2V to 3.3V, 5V compatible o 2Gbit DDR3 acquisition buffer for Logic Analyzer o Multiple trigger options including pin change, bus pattern, etc. o Digital bus analyzers (SPI, I²C, UART, Parallel) o Cross-triggering between Logic Analyzer, Pattern Generator, or external trigger • Pattern Generator o See digital inputs and outputs hardware specifications o 16 channels o 100 MS/s () sample rate o 1.2V to 3.3V outputs, 5V compatible o Algorithmic pattern generator (no buffers used) o Counter and custom bus outputs o ROM () logic for implementing user-defined Boolean functions and State Machines o Cross-triggering between Logic Analyzer, Pattern Generator, or external trigger • Protocol Analyzer o See hardware specifications o UART send and receive, SPI read and write, I2C read and write capable o 1.2 to 3.3V inputs and outputs, 5V compatible • Static I/O o See digital input and output hardware specifications o 16 digital I/Os arranged in two Pmod-style (2×6) connectors o All 16 digital I/Os can be configured as virtual buttons, LEDs, switches, slider, progress bar,and seven-segment display o Custom pattern buffer/ch.: 32K samples • Power Supplies o 1.2V to 3.3V o Available in the two Pmod-style connectors o 100 mA max output current • Other Features o USB bus powered o High Speed Adapter and High Speed Logic Probes available as optional add-on ▪ Twisted wire high-speed cable option for input channels to insure signal integrity o Free WaveForms software runs on Windows, MacOS () and Linux o Script Editor for custom or automatic tests or analysis o SDK available for custom applications o Data file import/export using standard formats o 80X80X25mm, 80g (without accessories) o includes: USB cable, fly-wire accessories Warranty Period : 1 Year

AI Tender Summary

OUR REF NO 45466285
AUTHORITY Boards / Undertakings / PSU
TENDER VALUE 1.40 Lakhs
LAST DATE 14-10-2024
Authority
Authority Name National Institute Of Technology
Work Description Tender For Digital Discovery Kit; USB embedded development tool for highspeed and multi-channel applications Hardware • High speed inputs o 24 high-speed input channels (DIN0…23), accessible through one 2×16 connector, used with theLogic Analyzer in WaveForms (560kΩ||10pF) • Digital inputs and outputs o 16 digital I/Os (DIO24…39) arranged in two Pmod-style (2×6) connectors, used with the LogicAnalyzer in WaveForms o Each of the 16 pins can be configured for input (Logic Analyzer) or set as output o 800 MS/s () input sample rate when using maximum 8 inputs (and the High Speed Adapter), 400 MS/s () with maximum 16 inputs (with the High Speed Adapter), 200 MS/s () and lower withmaximum 32 inputs o User programmable input and output LVCMOS voltage levels from 1.2V to 3.3V (5Vcompatible) o 100 MHz () signal input bandwidth o 50 MHz () output signal bandwidth o Automatic or manual strength and slew settings for outputs Virtual Instruments • Logic Analyzer o See High Speed Input Hardware Specifications o 32 Channels at 200 MS/s () o 16 Channels at 400 MS/s () (with the optional High Speed Adapter) o 8 Channels at 800 o MS/s () (with the optional High Speed Adapter) o User programmable voltage levels at 1.2V to 3.3V, 5V compatible o 2Gbit DDR3 acquisition buffer for Logic Analyzer o Multiple trigger options including pin change, bus pattern, etc. o Digital bus analyzers (SPI, I²C, UART, Parallel) o Cross-triggering between Logic Analyzer, Pattern Generator, or external trigger • Pattern Generator o See digital inputs and outputs hardware specifications o 16 channels o 100 MS/s () sample rate o 1.2V to 3.3V outputs, 5V compatible o Algorithmic pattern generator (no buffers used) o Counter and custom bus outputs o ROM () logic for implementing user-defined Boolean functions and State Machines o Cross-triggering between Logic Analyzer, Pattern Generator, or external trigger • Protocol Analyzer o See hardware specifications o UART send and receive, SPI read and write, I2C read and write capable o 1.2 to 3.3V inputs and outputs, 5V compatible • Static I/O o See digital input and output hardware specifications o 16 digital I/Os arranged in two Pmod-style (2×6) connectors o All 16 digital I/Os can be configured as virtual buttons, LEDs, switches, slider, progress bar,and seven-segment display o Custom pattern buffer/ch.: 32K samples • Power Supplies o 1.2V to 3.3V o Available in the two Pmod-style connectors o 100 mA max output current • Other Features o USB bus powered o High Speed Adapter and High Speed Logic Probes available as optional add-on ▪ Twisted wire high-speed cable option for input channels to insure signal integrity o Free WaveForms software runs on Windows, MacOS () and Linux o Script Editor for custom or automatic tests or analysis o SDK available for custom applications o Data file import/export using standard formats o 80X80X25mm, 80g (without accessories) o includes: USB cable, fly-wire accessories Warranty Period : 1 Year
Basic Detail
Tender No EC/OH35-IRG/DDK/Q/675/2024
Bidding Type Tender
Location
City surathkal
State Karnataka
Key Dates
Publish Date 27 Sep 2024
Submission Date 14 Oct 2024
Open Date 15 Oct 2024
Finance
Tender Value 1.40 Lakhs
Tender Fee Ref. Documents
EMD Ref. Documents
Exemption Not Available
Document List
18c89547-6cc7-4825-9a5e-192e577d319b.html
Doc4QDDK.pdf
Tendernotice_1.pdf

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Tender Timeline

Sep 27, 2024
11:30 IST

Tender Published

Tender notice published.

Completed
Oct 14, 2024
17:00 IST

Bid Submission Deadline

Online submission via eProcurement portal.

Completed
Oct 15, 2024

Bid Opening Date

Technical bids will be opened and evaluated.

Completed

Tender Documents

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html

18c89547-6cc7-4825-9a5e-192e577d319b.html

pdf

Doc4QDDK.pdf

pdf

Tendernotice_1.pdf

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