Tender For Pre Dispatch Inspection And Supply Of Standard Electronic Components
Tender Overview
Project Description
Pre Dispatch Inspection And Supply Of Standard Electronic Components Pre Dispatch Inspection And Supply Of Standard Electronic Components , 1 ) Ecl Quad Differential Receiver With 20 Pin Soic ( Wb ) Package Having Specifications Mentioned In Sr. No. 1 Of Annexure – I. , 2 ) Octal Ttl-To-Ecl Translators With Output Enable With 24 Pin Soic ( Dw ) Package Having Specifications Mentioned In Sr. No. 2 Of Annexure – I. , 3 ) Pecl / Ecl 1:2 Fanout Buffer With 8 Pin Soic ( D ) Package Having Specifications Mentioned In Sr. No. 3 Of Annexure – I. , 4 ) ±5-V Input, Precision Voltage Sensing Reinforced Isolated Amplifier With 8 Pin Soic ( Dwv ) Package Having Specifications Mentioned In Sr. No. 4 Of Annexure – I. , 5 ) 10 Tap 5 Ns High Performance 50 Ohm Passive Delay Line With 14 Pin Dip Package Having Specifications Mentioned In Sr. No. 5 Of Annexure – I. , 6 ) 10 Tap 10 Ns High Performance 50 Ohm Passive Delay Line With 14 Pin Dip Package Having Specifications Mentioned In Sr. No. 6 Of Annexure – I. , 7 ) 3.0Ghz Ecl / Pecl Differential Data And Clock D Flip-Flop With 8 Pin Soic ( N ) Package Having Specifications Mentioned In Sr. No. 7 Of Annexure – I. , 8 ) 1K Ohm 256 Tap Digital Potentiometer With Spi Interface And With 8 Pin Soic ( N ) Package Having Specifications Mentioned In Sr. No. 8 Of Annexure – I. , 9 ) 3.0V To 5.5V Dual Channel 250Kbps Rs-232 Line Driver / Receiver With + / -15-Kv Esd Protection With 16 Pin Soic ( D ) Package Having Specifications Mentioned In Sr. No. 9 Of Annexure – I.
BOQ
| Sl. No. | Item Description |
| 1 | 1) ECL Quad Differential Receiver with 20 pin SOIC (WB) package having specifications mentioned in Sr. No. 1 of Annexure – I. |
| 2 | 2) Octal TTL-to-ECL translators with output enable with 24 pin SOIC (DW) package having specifications mentioned in Sr. No. 2 of Annexure – I. |
| 3 | 3) PECL/ECL 1:2 Fanout Buffer with 8 pin SOIC (D) package having specifications mentioned in Sr. No. 3 of Annexure – I. |
| 4 | 4) ±5-V input, precision voltage sensing reinforced isolated amplifier with 8 pin SOIC (DWV) package having specifications mentioned in Sr. No. 4 of Annexure – I. |
| 5 | 5) 10 Tap 5 ns high performance 50 ohm passive delay line with 14 pin DIP package having specifications mentioned in Sr. No. 5 of Annexure – I. |
| 6 | 6) 10 Tap 10 ns high performance 50 ohm passive delay line with 14 pin DIP package having specifications mentioned in Sr. No. 6 of Annexure – I. |
| 7 | 7) 3.0GHz ECL/PECL Differential Data and Clock D Flip-Flop with 8 pin SOIC (N) package having specifications mentioned in Sr. No. 7 of Annexure – I. |
| 8 | 8) 1K ohm 256 tap digital potentiometer with SPI interface and with 8 pin SOIC (N) package having specifications mentioned in Sr. No. 8 of Annexure – I. |
| 9 | 9) 3.0V to 5.5V dual channel 250kbps RS-232 line driver/receiver with +/-15-kV ESD protection with 16 pin SOIC (D) package having specifications mentioned in Sr. No. 9 of Annexure – I. |
AI Tender Summary
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Tender Published
Tender notice published.
CompletedBid Submission Deadline
Online submission via eProcurement portal.
CompletedBid Opening Date
Technical bids will be opened and evaluated.
CompletedTender Documents
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