SUPPLY OF Digital System Design Lab logic gates trainer 1, universal gates trainer 1, sop & pos implementation trainer, adders and subtractors trainer, parallel adder and subtractor, demonstrator , multiplexer and demultiplexer, trainer 1, encoder and dec
Tender Overview
Project Description
SUPPLY OF Digital System Design Lab logic gates trainer 1, universal gates trainer 1, sop & pos implementation trainer, adders and subtractors trainer, parallel adder and subtractor, demonstrator , multiplexer and demultiplexer, trainer 1, encoder and decoder trainer 1, flip-flop demonstrator 1, counters trainer 1, shift registers trainer.
Corrigendum
| Sr No | Corrigendum Date | Corrigendum | Type | New Submission Date |
|---|---|---|---|---|
| 1 | 03-May-2021 | Date Extend | 03-May-2021 |
AI Tender Summary
Tender Timeline
Tender Published
Tender notice published.
CompletedCorrigendum-1 Issued
Clarifications on tender conditions and amendments issued.
CompletedBid Submission Deadline
Online submission via eProcurement portal.
CompletedBid Opening Date
Technical bids will be opened and evaluated.
CompletedTender Documents
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