Rajiv Gandhi Proudyogiki Vishwavidyalay-RGPV has published Rgpv/Rusa/2020/Ec/03 Rusa Ec Department Tender. Submission Date for this Tender is 08-10-2020. Electrification Work Tenders in EC Department UIT - RGPV, Bhopal Madhya Pradesh. Bidders can get complete Tender details and download the document.
| Name of Work : R & D Lab Advanced Research and Innovation Centre Department of Electronics and Communication, UIT RGPV | |||||
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| Sl. No. | Item Description | Item Code / Make | Quantity | Units | |
| 1 | 1 | High Definition Real Time Image Processing Package (FPGA Development Kit 1 Multi-touch LCD Module 2 HDMI-TX 2 HDMI-RX 2 8 Mega Pixel Digital Camera Package 2 PCIex4 Cabling Adapter & cable 2) | |||
| 2 | 1.01 | FPGA Development KIT \nSpecifications:\n228,000 logic elements (LEs), 17,133 total memory Kbits,1,288 18x18-bit multipliers blocks,2 PCI Express hard IP blocks,744 user I/Os,8 phase locked loops (PLLs)\nFPGA Configuration\nMAXII CPLD EPM2210 System Controller and Fast Passive, Parallel (FPP) configuration, On-board USB Blaster for use with the Programmer, Programmable PLL timing chip configured via MAX II CPLD, Supports JTAG mode\nMemory Devices\n 64MB Flash with a 16-bit data bus, 2MB SSRAM (512K x 32), DDR3 SO-DIMM Socket, Up to 8GB capacity\n Maximum memory clock rate at 533MHz, Theoretical bandwidth up to 68Gbps,Buttons, Switches and LEDs, 4 user-controllable LEDs, 4 buttons for user-defined inputs, 4 slide switches for user-defined inputs\nOn-Board Clocks\n50MHz oscillator, SMA Connectors. SMA connector pair for differential clock inputs. SMA connector pair for differential clock outputs, SMA connector for clock output, SMA connector for external clock input\nTwo PCI Express x4 Connectors\nSupport connection speed of Gen1 at 2.5Gbps/lane to Gen2 at 5.0Gbps/lane, High-speed transceiver channels up to 6.5 Gbps, Support downstream mode, Six 172-pins \nHigh Speed Mezzanine Card (HSMC)\n6 HSMC connectors\nConfigurable I/O standards - 1.5V, 1.8V, 2.5V, 3.0V, Total of 16 high-speed transceivers up to 6.5 Gbps, Among HSMC Port A to D, there are 55 true LVDS TX channels to 1.6Gbps and 17 emulated LVDS TX channels up to 1.1Gbps\nTwo 40-pin Expansion Headers,72 FPGA I/O pins; 4 power and ground lines,Configurable I/O standards - 1.5V, 1.8V, 2.5V, 3.0V, Shares pins with HSMC Port\nPower\n Standalone DC 19V input,FLOATPC – with Partial Reconfiguration and OpenCL License\n Multi-touch LCD Module \nSpecifications:\nLCD, 7-inch panel 800x480 pixels,24-bits color depth Multi-Touch Capacitive Touch Screen 5-point Multi-Touch Support I2C interface Gesture Support\nInterface\nIDE Connector, 2x20 GPIO connector with ITG (IDE to GPIO) adapter,IP-NIOS – Nios II Licenses,IP-ED8B10B – 8b/10b Encoder/ Decoder\nHDMI-TX \n Specifications:\nOne HSMC interface for connection purpose,One HDMI transmitter with single transmitting port,One 2K EEPROM, Powered from 3.3V and 12V pins of HSMC connector,IP-FFT – FFT/ IFFT\n HDMI-RX \n Specifications:\nOne HSMC interface for connection purpose One HDMI receiver with dual receiving ports, Two 2K EEPROM for storing EDID of two receiver ports separately Powered from 3.3V and 12V pins of HSMC connector IP-FIR – FIR Compiler \n8 Mega Pixel Digital Camera Package \nSpecifications:\n Package Interface: 2x20 GPIO with 3.3V I/O standard, MIPI Camera Module: Color Filter Arrangement: Bayer Pattern\nView Angel: 70 degrees,Lens Type: 1/3.2 inch, Pixels: 3264x2448 (8-megapixels), Frame Rate: Maximal 60 frame per second at 1408 x 792 resolution,Support Focus Control, Interface: MIPI,MIPI Decoder:MIPI CSI-2 compliant,MIPI to Parallel Port Converter,Supports up to 4 data lanes,IPS-VIDEO – Video & Image Processing Suite\nPCIex4 Cabling Adapter & cable \nSpecifications:\nUp to 8.0Gbps PCIe 3.0 Serial ReDriver,PCIe x4 Gen 3,Adjustable receiver equalization,Adjustable transmitter amplitude and de-emphasis,IP-PCI/T32 – PCI Target 32,IP-PCI/T64 – PCI Target 64 | item1 | 1 | Nos |
| 3 | 2 | High Speed DSP Development Board\n( Development Kit 1\nAD/DA Data Conversion Card 2\nPingalab with \nMaya (four packages with 5 user) 2)\nHigh Speed DSP Development Board\n( Development Kit 1\nAD/DA Data Conversion Card 2\nPingalab with \nMaya (four packages with 5 user) 2) | |||
| 4 | 2.1 | Development Kit\nSpecifications:\nFPGA Devices\n531,200 logic elements (LEs) ,27,376K total memory Kbits, 1,024 18x18-bit multipliers blocks, 4 PCI Express hard IP Blocks, 744 user I/Os, 8 phase locked loops (PLLs),FPGA Configuration, JTAG and Fast Passive Parallel (FPP) configuration, On-board USB Blaster,\nMemory Devices\n64 MB Flash with a 16-bit data bus, 2 MB ZBT SSRAM, I2C EEPROM,Two DDR2 SO-DIMM Sockets, 400 MHz clock rate\n Maximum theoretical bandwidth of over 102 Gbps, Up to 8-Gbyte capacity in total\nSD Card Socket\nProvides SPI and 4-bit SD mode for SD Card access Buttons, Switches and LEDs, 4 push-buttons , 4 slide switches, 8 LEDs, 8-position DIP switch, Two Seven Segments, Two independent seven segments\nOn-Board Clocks\n3 Programmable PLLs configured via FPGA, HSMA, HSMB transceiver clock source,SATA reference clock, FPGA LVDS clock input 50MHz/100MHz oscillator\nSMA Connectors\n2 SMA connector for external transceiver clock input,4 SMA connector for LVDS clock input/output, 2 SMA connectors for clock output,1 SMA connector for external clock input,Four Serial ATA Ports Support SATA 3.0 standard 6Gbps signaling rate,Two host and two device ports, Four Gigabit Ethernet Ports,Integrated 1.25 GHz SERDES,PCI Express x8 Edge Connector,Support connection speed of Gen1 at 2.5Gbps/lane to Gen2 at 5.0Gbps/lane Connection established with PC motherboard with x8 or x16 PCI,Express slot,\nTwo 172-pins High Speed Mezzanine Card (HSMC),2 female-HSMC connectors, I/O voltage 2.5V, Total of 12 high-speed transceivers at 8.5 Gbps,Total of 38 LVDS pair at 1.6 Gbps,Two 40-pin Expansion Headers,72 FPGA I/O pins, as well as 4 power and ground lines, are brought out to two 40-pin expansion connectors,40-pin header is designed to accept a standard 40-pin ribbon cable used for IDE hard drives I/O voltage 3.0V\nUSB Host/Slave Controller, Complies fully with Universal Serial Bus Specification Rev. 2.0, Support data transfer at high-speed, full-speed, and low-speed Support both USB host and device, Three USB ports (one type mini-AB for host/device and two type A for host) Support Programmed I/O (PIO) and Direct Memory Access (DMA)\nPower\nDC input 12V and 3.3V\nPCI Express edge connector power, FLOATPC –with Partial Reconfiguration and OpenCL License,IP-NCO – Numerically Controlled Oscillator\nAD/DA Data Conversion Card \nSpecifications:\n One High Speed Mezzanine Card (HSMC) connector for interface conversion, which is fully compatible with\nDevelopment boards and host boards. External Clock In / Out Interface, Two 14-bit Analog to Digital (A/D) converter channel with 150MSPS, Two 14-bit Digital to Analog (D/A) converter channel with 250MSPS, One Audio CODEC with Line-In, Line-Out, MIC and Headphone\n Size :145mm x 80mm x 18mm (L x W x H)\nPingalab with Maya (four packages with 5 user) | item2 | 1 | Nos |
| 5 | 3 | Advanced Digital System Development with Partial Reconfiguration and open CL\n(FPGA Development Board 1\nFPGA Educational Development Board 10\nRF & Sensor Interface Card 5\nServo Motor Kit with Power Supply 5\nIntel FPGA ICB HSMC Card 2) | |||
| 6 | 3.1 | FPGA Development Board \nSpecifications:\nFPGA Configuration\nOn-Board USB Blaster II or JTAG header for FPGA programming, Fast passive parallel (FPPx32) configuration via MAX II CPLD and flash memory, \nMemory \nTwo Independent DDR3 SODIMM Socket, Up to 8GB 800 MHz or 4GB 933 MHz for each socket, Four Independent 550MHz SRAM, 18-bits data bus and 72Mbit for each 256MB FLASH\nCommunication Ports\nFour SFP+ connectors, PCI Express (PCIe) x8 edge connector (includes Windows PCIe drivers), One RS422 expansion header\nGeneral user input / output: 4 LEDs,1 LED Array, 4 push-buttons, 4 slide switches, 2 seven-segment displays, SMA clock input / output\nOn-Board Clock\n50MHz Oscillator, Programmable oscillators Si570, CDCM61001 and CDCM61004, \nSystem Monitor and Control\n Temperature sensor, Fan control\nPCI Express 6-pin power connector, 12V DC Input, PCI Express edge connector power\nMechanical Specification\nPCI Express standard height and 3/4-length\nFLOATPC –with Partial Reconfiguration and OpenCL License\nIP-DSPBUILDER – DSP Builder Software\nFPGA Educational Development Board \nSpecifications:\nFeatures\n 114,480 logic elements (LEs), 3,888 Embedded memory (Kbits),266 Embedded 18 x 18 multipliers, 4 General-purpose PLLs, 528 User I/Os, Configuration Device and USB-Blaster Circuit EPCS64 serial configuration device, On-board USB-Blaster circuitry, JTAG and AS mode configuration supported\nMemory Devices 128MB (32Mx32bit) SDRAM, 2MB (1Mx16) SRAM, 8MB (4Mx16) Flash with 8-bit mode, 32Kbit EEPROM\nSwitches and Indicators 18 switches and 4 push-buttons, 18 red and 9 green LEDs, Eight 7-segment displays, \nAudio 24-bit encoder/decoder(CODEC), line-in, line-out, and microphone-in jacks,Display 16x2 LCD module\nOn-Board Clocking Circuitry Three 50MHz oscillator clock inputs, SMA connectors (external clock input/output)\nSD Card Socket Provides SPI and 4-bit SD mode for SD Card access\nTwo Gigabit Ethernet Ports Integrated 10/100/1000 Gigabit Ethernet, Supports Industrial Ethernet IP cores\n172-pin High Speed Mezzanine Card (HSMC)\nConfigurable I/O standards (voltage levels: 3.3/2.5/1.8/1.5V)\nUSB Type A and B\nProvide host and device controller compliant with USB 2.0\n Support data transfer at full-speed and low-speed\nPC driver available\n40-pin Expansion Port\nConfigurable I/O standards (voltage levels: 3.3/2.5/1.8/1.5V)\nVGA-out Connector\nVGA DAC (high speed triple DACs)\nDB-9 Serial Connector, RS232 port with flow control,PS/2 Connector,S/2 connector for connecting a PS2 mouse or keyboard to the Remote Control,Infrared receiver module,TV-in Connector,TV decoder (NTSC/PAL/SECAM)\nPower\nDesktop DC input\nSwitching and step-down regulators LM3150MH,FLOATPC –with Partial Reconfiguration and OpenCL License, IP-RSDEC – Reed-Solomon Decoder, IP-RSENC – Reed-Solomon Encoder\n RF & Sensor Interface Card \nSpecifications:\nWi-Fi, using ESP-WROOM-02 module, up to 100 meter range, Bluetooth SPP, using HC-05 module, up to 10 meter range\n9-axis sensor: accelerometer, gyroscope, magnetometer, Ambient light sensor, Humidity and temperature sensor\nUART to USB\n2x6 TMD GPIO Header, IP-VITERBI/HS – Viterbi High Speed Decoder, IP-VITERBI/SS – Viterbi Serial Decoder\n Servo Motor Kit with Power Supply \nSpecifications:\nMotor Driver Daughter Card\n Input 6.2~12V DC for driving motors , Provide 5V DC power output for host board, 2X20 3.3V GPIO Interface\nDrive 24 servo motors at most, Fuse protection for each servo driving port\nBuild-In Altera CPLD and Power Monitor Chip:\n Battery voltage monitor\n Total current monitor\n Auto shutdown when battery is low or total current is too high\nSource code is available for users to modify according to their application\nServo Motor MG966R\nRotation Angle: 0~120\nWeight: 55g\nDimension: 40.7×19.7×42.9mm\n Stall torque: 9.4kg/cm (4.8v); 11kg/cm (6.0v)\nOperating speed: 0.19sec/60degree (4.8v); 0.15sec/60degree (6.0v)\nOperating voltage: 4.8~ 6.6v\nGear Type: Metal gear\nIP-SDRAM/DDR – DDR SDRAM Interface Controller\n FPGA ICB HSMC Card \nSpecifications:\nHigh-Speed Mezzanine Card (HSMC) connector for interface conversion, Two CAN DB9 connectors, Two RS-485 DB9 connectors, RS-232 DB9 connector, Two 6-pin SPIO ports, 12-pin SPIO port, 40-pin expansion port\nSeven 10-pin headers for supported communication protocols (RS-232, CAN, RS-485) and signal measurement, IP-SDRAM/DDR2 – DDR2 SDRAM Interface Controller | item3 | 1 | Nos |
| 7 | 4 | Embedded System\n(Lite Board 5\nVideo Embedded Evaluation Kit 2) | |||
| 8 | 4.1 | Lite Board\nSpecifications:\nFPGA Device\nIntegrated dual ADCs, each ADC supports 1 dedicated analog input and 8 dual function pins, 50K programmable logic elements, 1,638 Kbit M9K Memory, 144 18 × 18 Multiplier, 4 PLLs, \nProgramming and Configuration\nOn-Board USB Blaster (Normal type B USB connector)\nMemory Device\n 64MB SDRAM, x16 bits data bus\nSensor\nAccelerometer\nExpansion Connectors\n One 2x20 GPIO Connector(voltage levels: 3.3V)\n Arduino Uno R3 Connector, including six ADC channels.\nDisplay\n4-bit Resistor VGA\nSwitches/Buttons/LEDs/7-Segment Display 10 LEDs, 10 Slide Switches,2 Push Buttons. Six 7-Segments Display\nPower\n5V DC input\nFLOATPC –with Partial Reconfiguration and Open CL License\nVideo Embedded Evaluation Kit \nSpecifications:\nDual-core ARM Cortex-A9 (HPS), 110K programmable logic elements, 5,761 Kbits embedded memory, 6 fractional PLLs\n2 hard memory controllers\nConfiguration Sources\nSerial configuration device – EPCS128 for the FPGA\nOn-board USB Blaster II (normal type B USB connector)\nMemory Device\n64MB (32Mx16) SDRAM for the FPGA\n1GB (2x256MBx16) DDR3 SDRAM for the HPS\n microSD card socket for the HPS\nPeripherals\nTwo USB 2.0 Host Ports (ULPI interface with USB type A connector) on HPS, UART to USB (USB Mini B connector)\n 10/100/1000 Ethernet, PS/2 mouse/keyboard, IR emitter/receiver, I2C multiplexer\nConnectors\n One HSMC expansion header (used for MTLC2), One 40-pin expansion header, One 10-pin ADC input header\nOne LTC connector (one Serial Peripheral Interface (SPI) master, one I2C bus, and one GPIO interface), \nDisplay\n24-bit VGA DAC, 128x64 dots LCD Module with Backlight on HPS\nAudio\n24-bit CODEC, Line-in, line-out, and microphone-in jacks\nVideo Input\nTV decoder (NTSC/PAL/SECAM) and Video-in connector\nADC\nSample rate: 500 KSPS, Channel number: 8, Resolution: 12 bits, Analog input range : 0 ~ 4.096 V, Switches, Buttons and LEDs , 5 user keys (4 for the FPGA and 1 for the HPS), 10 user switches for the FPGA, 11 user LEDs (10 for the FPGA and 1 for the HPS), 2 HPS reset buttons (HPS_RESET_n and HPS_WARM_RST_n), Six 7-segment displays\nSensors\n G-Sensor on HPS\nPower\n 12V DC input\nCapacitive Multi-touch Screen Module\nLCD Display\n7-inch TFT LCD with pixel resolution of 800*480, 16 million colors (8-bit RGB), LED backlight\nCapacitive Multi-Touch\nFive points multi-touch\n I2C interface\nGesture supporting\nTwo-Point\n8-Megapixel Digital Image Sensor\n3,264H x 2,448V active pixels with Bayer color arrangement\n Sensitivity 940mV/Lux-sec, Gesture supporting, Ambient Light Sensor, Precise illumination measurement under diverse lighting conditions, Programmable interrupts, 16-bit digital output with I2C fast-mode at 400 kHz, Programmable analog gain and Integration time 50/60Hz lighting ripple rejection\nAccelerometer Features\nDigital-output triple-axis accelerometer, Programmable full scale range of ±2g, ±4g, ±8g and ±16g and integrated 16-bit\n Self-test\nGyroscope Features\n Digital-output X-, Y-, and Z-Axis angular rate sensors, User-programmable full-scale range of ±250, ±500, ±1000, and ±2000°/sec and integrated 16-bit ADCs\nSelf-test\nMagnetometer Features\n3-axis silicon monolithic Hall-effect magnetic sensor with magnetic concentrator Wide dynamic measurement range and high resolution with lower current consumptions, Output data resolution of 14 bit (0.6µT/LSB) or 16 bit (15µT/LSB)\nFull scale measurement range is ±4800µT, Magnetometer normal operating current: 280µA at 8Hz repetition rate\nSelf-test function with internal magnetic source to confirm magnetic sensor operation on end products\nFLOATPC –with Partial Reconfiguration and OpenCL License | item4 | 1 | Nos |
| 9 | 5 | SoC Development Package\n(SoC Development Board 5) | |||
| 10 | 5.1 | Soc Development Board\nSpecifications:\nDual-core ARM Cortex-A9 (HPS)\n85K programmable logic elements,4,450 Kbits embedded memory, 6 fractional PLLs,2 hard memory controllers\nConfiguration Sources\n Serial configuration device – EPCS128 for the FPGA, On-board USB Blaster II (normal type B USB connector)\nMemory Device\n 64MB (32Mx16) SDRAM for the FPGA, 1GB (2x256MBx16) DDR3 SDRAM for the HPS, micro SD card socket for the HPS\nPeripherals\nTwo USB 2.0 Host Ports (ULPI interface with USB type A connector) on HPS, UART to USB (USB Mini B connector)\n10/100/1000 Ethernet, PS/2 mouse/keyboard, IR emitter/receiver,I2C multiplexer\nConnectors\n Two 40-pin expansion headers, One 10-pin ADC input header, One LTC connector (one Serial Peripheral Interface (SPI) master ,one I2C bus, and one GPIO interface)\nDisplay\n24-bit VGA DAC\nAudio\n24-bit CODEC, Line-in, line-out, and microphone-in jacks\nVideo Input\nTV decoder (NTSC/PAL/SECAM) and Video-in connector\nADC sample rate: 500 KSPS, Channel number: 8, Resolution: 12 bits, Analog input range : 0 ~ 4.096 V, Switches, Buttons, and LEDs, 5 user keys (4 for the FPGA and 1 for the HPS), 10 user switches for the FPGA, 11 user LEDs (10 for the FPGA and 1 for the HPS), 2 HPS reset buttons (HPS_RESET_n and HPS_WARM_RST_n), Six 7-segment displays\nSensors G-Sensor on HPS, \nPower\n12V DC input\nCapacitive Multi-touch Screen\nLCD Display, 7-inch TFT LCD with pixel resolution of 800*480, 16 million colors (8-bit RGB)\nLED backlight\nCapacitive Muti-Touch\nFive points multi-touch\nI2C interface\n Gesture supporting\nFLOATPC –with Partial Reconfiguration and OpenCL License\nIP-SRAM/QDRII – QDRII SRAM Interface Controller\nIP-Triple Speed Ethernet MAC | item5 | 1 | Nos |
| 11 | 6 | Educational Laboratory Virtual Instruments Suite | |||
| 12 | 6.1 | Educational Laboratory Virtual Instruments Suite\nSoftware includes interactive web and desktop soft front panels, instrumentation support for Windows and Mac, API support for LabVIEW and text-based languages\nSeven hardware instruments plus control I/O containing 16 AI, 4 AO, and 40 DIO \n4-channel, 100 MS/s (400 MS/s single channel), 50 MHz oscilloscope with 14-bit resolution \n16-channel, 100 MS/s logic analyzer/pattern generator \n16-channel, 1 MS/s analog input with 16-bit resolution \n40 DIO lines individually programmable as input, output, PWM, or digital protocols | item6 | 1 | Nos |
| 13 | 7 | RIO with Starter, Embedded and Mechatronics Sensor Kit | |||
| 14 | 7.1 | The RIO Student Embedded Device features I/O on both sides of the device in the form of MXP and MSP connectors. It includes analog inputs, analog outputs, digital I/O lines, LEDs, a push button, an onboard accelerometer, a Xilinx FPGA, and a dual-core ARM Cortex-A9 processor With Starter Embedded and Mechatronics Accessary Kit | item7 | 1 | Nos |
| 15 | 8 | Software Defined Radio Reconfigurable Input Output\nVirtual Bench | |||
| 16 | 8.1 | MIMO system- – An integrated hardware and software solution for rapidly prototyping high-performance wireless communication systems. For prototyping a wide range of advanced research applications that include multiple input, multiple output (MIMO); synchronization of heterogeneous networks; LTE relaying; RF compressive sampling; spectrum sensing; cognitive radio; beam forming; and direction finding. \nHardware Includes: \n1. Bandwidth- 40MHz, Frequency range-10MHz to 6 GHz SDR \n2. Antenna (144 MHz, 400 MHz, 1200 MHz) Triband \n3. 2.4 – 2.5 GHz Dual Band Vertical Antenna \n4. PCIE - MXI Express Interface Kit for USRP RIO \n5. Express Card Slot - MXI Express Interface Kit for USRP RIO \n6. Cables and Accessories \n | item8 | 1 | Nos |
| 17 | 9 | Virtual Bench | |||
| 18 | 9.1 | Analog Channel- Number of channels 2 single-ended, non-isolated Bandwidth (-3 dB)\n100 MHz, Digital Channels/Logic Analyzer Vertical System Number of channels 34 Maximum input frequency 100 MHz Input voltage 0 V to 5 V, Function Generator (FGEN) Waveforms Sine, square, ramp/triangle, DC, arbitrary Update rate -125 MS/s, Number of DI/O Channel – 8, Digital Multimeter Functions DC voltage, AC voltage, DC current, AC current, resistance, diode, continuity etc measurement, Resolution 5½ digits Sample rate 5 S/s\nBNC Male to Micro grabber Cable, 87 cm-1 Qty.\nP-2 DMM Probe Set with 2 Alligator Clips, Spade Connectors, Spring Hooks, and 1 m Test Leads-1 Qty.\nMSO Logic Analyzer 40 Pin Input Cable, 0.5 m-1 Qty.\n | item9 | 1 | Nos |
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