Tender For Supply Of Digital System Design Lab
Tender Overview
Project Description
Tender For Supply Of Digital System Design Lab-Logic Gate Trainer Kit, Universal Logic Gate Trainer Kit, Sop And Pos Trainer Kit, Trainner Kit Of Half Adder / Subtractor& Full Adder / , Subtractor ( Nand & Nor Gates ) Trainer Kit To 4-Bit Ripple Adder / Subtractor ( Using Basic Half Adder / , Subtractor& Basic Full Adder / Subtractor ) . , Trainer, Kit Of 4-To-1 Multiplexer ( Using Basic Gates And Verify The Truth Table. Also Verify The Truth Table Of 8-To-1 Multiplexer Using Ic ) , Trainer Kit Of 1-To-4 Demultiplexer ( To Construct 1-To-8 Demultiplexer Using Blocks Of 1-To-4 Demultiplexer ) , 2X4 Decoder Trainer Kit Combinational Circuit Trainer Kit, Flip- Flop Realistation Trainer Kit:, 2, 4 & 8 Asynchronous Counter Trainer Kit, 12 Shift Register Trainer Kit, 13 Trainer Kit Of Bcd Ripple Counter
AI Tender Summary
Tender Timeline
Tender Published
Tender notice published.
CompletedBid Submission Deadline
Online submission via eProcurement portal.
CompletedBid Opening Date
Technical bids will be opened and evaluated.
CompletedTender Documents
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