Tenders Are Invited For Implementation And Engineering Model Testing Of Ip Blocks For Image Sensor Outputs Faster Than 1 Gbit/S

Tenders are invited for Implementation and Engineering Model Testing of Ip Blocks for Image Sensor Outputs Faster than 1 Gbit/S Objectives:To have a fully European IP block to be used by European Image Sensor designers heavily dependent onnon-European sources. The objective of this activity is to design and validate high throughput serial outputsfor image sensors for dual use applications.Description:The future of infrared and visible sensors (larger formats, smaller pixels, fast frame rates) is tightly linkedtothe ability to read them out fast, but European detector manufacturers have not yet developed thecapability to adopt newer and faster communication protocols.In applications like Earth Observation, there is trend in image sensors towards more pixels and faster framerates, with analogue to digital conversion performed on chip. Transfer of information from the detector diecan become challenging using parallelized transfer standards, either limiting the frame rate or increasingthe complexity of the electrical interface.JESD204 interface standard is an ideal solution, offering a higherspeedserial interface with reduced pin-counts compared to the options currently used.In this activity, a JESD204-enabling circuitry for the Read-Out Integrated Circuits (ROICs) of image sensorsshall be implemented in the selected technology node and verified to be used in future detector designs.The IP blocks shall be radiation hard and compatible with a European foundry. The design shall bedemonstrated and verified, with the IP blocks becoming available for the European detector designcommunity.Parallel developments targeting most relevant technologies for infrared CMOS ROICs manufactured inEurope shall be implemented. It is anticipated that this leap-forward in interface speed and simplicity shallbe adopted by all European detector manufacturers using the relevant technology nodes and so shallbecome the dominant output interface in European space missions using digital output infrared sensors.This activity shall encompass the following tasks:- Study the latest JESD204 standard and future needs of the detector market in line with the developmentschedule of this activity- Derivation of requirements, IP Blocks architecture and identification of configurable parameters- Design of the IP blocks including test circuitry- Manufacture engineering model devices- Design and manufacture of the EGSE to assess the devices- Electrical and radiation test andcharacterization of the devices- Debugging and realization of the prototype- Support detector companies to implement and interface with the IP block.Read more Tender Link : https://esastar-publication-ext.sso.esa.int/ESATenderActions/filter/open