Tenders Are Invited For Development Of A Standardised Process For Photonic Integrated Circuits (Pics) And Electronics Integration Technology (Artes 4.0 Sl Spl 5F.042) Expro+
Tenders Are Invited For Development Of A Standardised Process For Photonic Integrated Circuits (Pics) And Electronics Integration Technology (Artes 4.0 Sl Spl 5F.042) Expro+
Tenders are invited for Development of a Standardised Process for Photonic Integrated Circuits (Pics) and Electronics Integration Technology (Artes 4.0 Sl Spl 5f.042) Expro+ Objective:To improve the level of integration between photonics and electronics circuits, which will enable performance and efficiency gains, size reduction and scalability to a high-density photonic integrated circuit (PIC)-based system with 100+ actuators.Targeted Improvements:Improvement in the system scalability (from 10s to 100s actuators per chip) to enable high-density PICs to beintegrated with driving and control mixed-signal electronics circuits. Improvement in the bandwidth of the connection between PIC and electronic circuit. BW 30 GHz is targeted.Description:Photonics Integrated Circuits (PICs) have been identified as enabling technology for future optical and photonics equipment for satellites due to their advantage of reduced SWaP and cost of equipment. Thebroad range of PIC technologies (InP, GaAs, SOI, TFLN, SiN and hybrids) is an advantage, but this variety creates a stumbling blockin implementation for space. In addition, PICs-based equipment requires a dedicated driving electronics, which will often need to operate at higher frequencies (30 GHz) and high voltage or current. This creates a particular challenge for high density PICs which may incorporate a large number of components with 100s of actuators. If we could work towards a unified photonics-electronics integration process and a suitable package assembly for all very high-density PICs, it would facilitate faster implementation of this technology. The considered photonics-electronics connectivity solutions include, but are not limited to, wire-bonds, ribbon-bonds, flip-chip, and heterodyne integration techniques. A coordinated activity is required to support primes (which have interest in all PIC platforms) as well as numerous SMEs packaging companies and European PIC foundries.Procurement Policy: C(1) = Activity restricted tonon-prime contractors (incl. SMEs). For additional information please go to:http://www.esa.int/About_Us/Business_with_ESA/Small_and_Medium_Sized_Enterprises/Opportunities_for_SMEs/Procurement_policy_on_fair_access_for_SMEs_-_the_C1-C4_ClausesRead more Tender Link : https://esastar-publication-ext.sso.esa.int/ESATenderActions/filter/open
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